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MB90340E Series
FEATURES
CPU * Instruction system best suited to controller - Wide choice of data types (bit, byte, word, and long word) - Wide choice of addressing modes (23 types) - Enhanced functionality with signed multiply and divide instructions and the RETI instruction - Enhanced high-precision computing with 32-bit accumulator * Instruction system compatible with high-level language (C language) and multitask - Employing system stack pointer - Various enhanced pointer indirect instructions - Barrel shift instructions * Increased processing speed - 4-byte instruction queue Serial interface * LIN-UART : 4 channels - Equipped with full-duplex double buffer - Clock-asynchronous or clock-synchronous serial transmission is available * I2C interface : 2 channels (only for devices with a C suffix in the part number) - Up to 400 kbps transfer rate Interrupt controller * Powerful 8-level, 34-condition interrupt feature * Up to 16 external interrupts are supported * Automatic data transfer function independent of CPU - Expanded intelligent I/O service function (EI2OS) : up to 16 channels I/O ports * General-purpose input/output port (CMOS output) - 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock) - 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock) 8/10-bit A/D converter * 16 channels (only for devices without a C suffix in the part number) * 24 channels (only for devices with a C suffix in the part number) * Resolution is selectable between 8-bit and 10-bit. * Activation by external trigger input is allowed. * Conversion time : 3 s (at 24 MHz machine clock, including sampling time) Address match detection (program patch) function * Detects address matches against 6 address pointers Timer * Time-base timer, watch timer, watchdog timer : 1 channel * 8/16-bit PPG timer : 8-bit x 16 channels, or 16-bit x 8 channels * 16-bit reload timer : 4 channels * 16-bit input/output timer - 16-bit free-run timer : 2 channels (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7) - 16-bit input capture: (ICU): 8 channels - 16-bit output compare: (OCU): 8 channels (Continued)
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MB90340E Series
(Continued) Full-CAN controller * Up to 2 channels * Compliant with Ver2.0A and Ver2.0B CAN specifications * 16 built-in message buffers * CAN wake-up function Low power consumption (standby) mode * Sleep mode (a mode that halts CPU operating clock) * Timebase timer mode (a mode where only the oscillation clock, sub clock, timebase timer and watch timer operate) * Watch mode (a mode that operates sub clock and watch timer only) * Stop mode (a mode that stops oscillation clock and sub clock) * CPU intermittent operation mode Clock modulation circuit Technology * CMOS technology
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MB90340E Series
PRODUCT LINEUP
Part Number
MB90V340E-101, MB90V340E-102 MB90F342E(S), MB90F342CE(S), MB90F345E(S), MB90F345CE(S), MB90F346E(S), MB90F346CE(S), MB90F347E(S), MB90F347CE(S), MB90F349E(S), MB90F349CE(S) MB90341E(S), MB90341CE(S), MB90342E(S), MB90342CE(S), MB90346E(S), MB90346CE(S), MB90347E(S), MB90347CE(S), MB90348E(S), MB90348CE(S), MB90349E(S), MB90349CE(S)
Parameter Type CPU System clock Evaluation products
Flash memory products F MC-16LX CPU
2
MASK ROM products
On-chip PLL clock multiplier (x 1, x 2, x 3, x 4, x 6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (4 MHz osc. PLL x 6)
512 Kbytes : MB90F345E(S), MB90F345CE(S) 256 Kbytes : MB90F342E(S), MB90F342CE(S), MB90F349E(S), MB90F349CE(S) 128 Kbytes : MB90F347E(S), MB90F347CE(S) 64 Kbytes : MB90F346E(S), MB90F346CE(S) 20 Kbytes : MB90F345E(S), MB90F345CE(S) 16 Kbytes : MB90F342E(S), MB90F342CE(S), MB90F349E(S), MB90F349CE(S) 6 Kbytes : MB90F347E(S), MB90F347CE(S) 2 Kbytes : MB90F346E(S), MB90F346CE(S) 256 Kbytes : MB90342E(S), MB90342CE(S), MB90349E(S), MB90349CE(S) 128 Kbytes : MB90341E(S), MB90341CE(S), MB90347E(S), MB90347CE(S), MB90348E(S), MB90348CE(S) 64 Kbytes : MB90346E(S), MB90346CE(S) 16 Kbytes : MB90341E(S), MB90341CE(S), MB90342E(S), MB90342CE(S), MB90348E(S), MB90348CE(S), MB90349E(S), MB90349CE(S) 6 Kbytes : MB90347E(S), MB90347CE(S) 2 Kbytes : MB90346E(S), MB90346CE(S)
ROM
External
RAM
30 Kbytes
Emulator-specific power supply* Technology Operating voltage range Temperature range Package LIN-UART
Yes 0.35 m CMOS with 0.35 m CMOS with built-in power supply regulator + regulator for built-in Flash memory with Charge pump for programming voltage power supply 5 V 10% 3.5 V to 5.5 V : When normal operating (not using A/D converter) 4.0 V to 5.5 V : When using the A/D converter/Flash programming 4.5 V to 5.5 V : When using the external bus S PGA-299 5 channels 40 C to +105 C QFP-100, LQFP-100 4 channels
Wide range of baud rate settings using a dedicated baud rate generator (reload timer) Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device 2 channels Devices with a C suffix in the part number : 2 channels Devices without a C suffix in the part number : (Continued)
I2C (400 kbps)
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PIN ASSIGNMENTS
* MB90341E(S), MB90342E(S), MB90F342E(S), MB90F345E(S), MB90346E(S), MB90F346E(S), MB90347E(S), MB90F347E(S), MB90348E(S), MB90349E(S), MB90F349E(S) (TOP VIEW)
P03/AD03/INT11 P02/AD02/INT10 P01/AD01/INT9 P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/INT7 P76/INT6
MD0 MD1
P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/INT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 81 50 49 82 48 83 47 84 46 85 45 86 44 87 43 88 QFP - 100 42 89 41 90 40 91 39 92 38 93 37 94 36 95 35 96 34 97 33 98 32 99 31 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 P32/WRLX/WRX/INT10R P33/WRH P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A * P41/X1A * Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/FRCK0 P45/FRCK1 P46 P47 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P54/AN12/TOT3 P55/AN13 P56/AN14 P34/HRQ/OUT4 P35/HAK/OUT5 P24/A20/IN0 P25/A21/IN1 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5
RST
MD2
P75/INT5 P74/INT4 P73/INT3 P72/INT2 P71/INT1 P70/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15
(FPT-100P-M06) * : X0A, X1A : devices without an S suffix in the part number P40, P41 : devices with an S suffix in the part number (Continued)
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MB90340E Series
(Continued) (TOP VIEW)
P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/INT7 P76/INT6
P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R
P01/AD01/INT9 P02/AD02/INT10 P03/AD03/INT11 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/INT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) P24/A20/IN0 P25/A21/IN1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 50 49 77 48 78 47 79 80 46 81 45 82 44 83 43 84 42 85 41 86 40 87 39 LQFP - 100 88 38 89 37 90 36 91 35 92 34 93 33 94 32 95 31 96 30 97 29 98 28 99 27 100 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5 P32/WRL/WR/INT10R P33/WRH P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/FRCK0 P45/FRCK1 P46 P47 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3
RST
MD0
MD1 MD2 P75/INT5 P74/INT4 P73/INT3 P72/INT2 P71/INT1 P70/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15 P56/AN14 P55/AN13 P54/AN12/TOT3
(FPT-100P-M20) * : X0A, X1A : devices without an S suffix in the part number P40, P41 : devices with an S suffix in the part number
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MB90340E Series
* MB90V340E-101/MB90V340E-102
(TOP VIEW)
P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/INT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13/SIN4 P16/AD14/SOT4 P17/AD15/SCK4 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 81 82 49 83 48 84 47 85 46 86 45 87 44 88 43 89 42 90 41 QFP - 100 91 40 92 39 93 38 94 37 95 36 96 35 97 34 98 33 99 32 100 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
P24/A20/IN0 P25/A21/IN1 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5 P32/WRL/WR/RX2/INT10R P33/WRH/TX2 P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P54/AN12/TOT3 P55/AN13 P56/AN14/DA00
P03/AD03/INT11 P02/AD02/INT10 P01/AD01/INT9 P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 RST MD0 MD1 MD2
P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15/DA01
(FPT-100P-M06) * : X0A, X1A : MB90V340E-102 P40, P41 : MB90V340E-101
This pin assignment is for using MB90V340E-101/102 via probecable as MB90340E. (Continued)
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MB90340E Series
(Continued)
(TOP VIEW)
P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 RST
P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R
P01/AD01/INT9 P02/AD02/INT10 P03/AD03/INT11 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/INT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13/SIN4 P16/AD14/SOT4 P17/AD15/SCK4 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) P24/A20/IN0 P25/A21/IN1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 50 77 49 78 48 47 79 46 80 45 81 44 82 43 83 42 84 41 85 40 86 39 87 38 88 LQFP - 100 37 89 36 90 35 91 34 92 33 93 32 94 31 95 30 96 29 97 98 28 99 27 100 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P32/WRL/WR/RX2/INT10R P33/WRH/TX2 P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5
MD0
MD1 MD2 P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15/DA01 P56/AN14/DA00 P55/AN13 P54/AN12/TOT3
(FPT-100P-M20) * : X0A, X1A : MB90V340E-102 P40, P41 : MB90V340E-101
This pin assignment is for using MB90V340E-101/102 via probecable as MB90340E.
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MB90340E Series
Pin No. QFP100*1 LQFP100*2 Pin name
I/O Circuit type*3
Function General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the hold function is disabled. Hold request input pin. This function is enabled when both the external bus and the hold function are enabled. Waveform output pin for output compare. General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the hold function is disabled. Hold acknowledge output pin. This function is enabled when both the external bus and the hold function are enabled. Waveform output pin for output compare. General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the external ready function is disabled. External ready input pin. This function is enabled when both the external bus and the external ready function are enabled. Waveform output pin for output compare. General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the clock output is disabled. Clock output pin. This function is enabled when both the external bus and clock output are enabled. Waveform output pin for output compare General purpose I/O pins. (devices with an S suffix in the part number and or MB90V340E-101) Oscillation pins for sub clock (devices without an S suffix in the part number and or MB90V340E-102) Power (3.5 V to 5.5 V) input pin GND pin This is the power supply stabilization capacitor This pin should be connected to a ceramic capacitor with a capacitance greater than or equal to 0.1 F. General purpose I/O pin. Trigger input pin for input capture.
P34 9 7 HRQ OUT4 P35 10 8 HAK OUT5 P36 11 9 RDY OUT6 P37 12 10 CLK OUT7 P40, P41 13, 14 11, 12 X0A, X1A 15 16 17 13 14 15 VCC VSS C P42 IN6 18 16 RX1 INT9R F K B F G G G G
RX input pin for CAN1 Interface (MB90341E/342E/F342E/F345E only) External interrupt request input pin (Continued)
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MB90340E Series
Pin No. QFP100*1 LQFP100*2 Pin name P43 19 17 IN7 TX1 P44 20 18 SDA0 FRCK0 P45 21 19 SCL0 FRCK1 P46 22 20 SDA1 P47 23 21 SCL1 P50 24 22 AN8 SIN2 P51 25 23 AN9 SOT2 P52 26 24 AN10 SCK2 P53 27 25 AN11 TIN3 P54 28 26 AN12 TOT3 29 30, 31 32 27 28, 29 30 P55 AN13 P56, P57 AN14, AN15 AVCC
I/O Circuit type*3 General purpose I/O pin. F
Function
Trigger input pin for input capture. TX Output pin for CAN1 (MB90341E/342E/F342E/F345E only) General purpose I/O pin. Serial data I/O pin for I2C (devices with a C suffix in the part number) Input pin for the 16-bit Free-run Timer 0 General purpose I/O pin.
H
H
Serial clock I/O pin for I2C (devices with a C suffix in the part number) Input pin for the 16-bit Free-run Timer General purpose I/O pin.
H
Serial data I/O pin for I2C (devices with a C suffix in the part number) General purpose I/O pin. Serial clock I/O pin for I2C (devices with a C suffix in the part number) General purpose I/O pin. Analog input pin for the A/D converter Serial data input pin for UART2 General purpose I/O pin.
H
O
I
Analog input pin for the A/D converter Serial data output pin for UART2 General purpose I/O pin.
I
Analog input pin for the A/D converter Clock I/O pin for UART2 General purpose I/O pin.
I
Analog input pin for the A/D converter Event input pin for the reload timer General purpose I/O pin.
I
Analog input pin for the A/D converter Output pin for the reload timer General purpose I/O pin. Analog input pin for the A/D converter General purpose I/O pins. Analog input pins for the A/D converter Analog power input pin for the A/D Converter (Continued)
I J K
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MB90340E Series
Pin No. QFP100*1 LQFP100*2 Pin name
I/O Circuit type*3
Function General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Output pin for the reload timer General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.
P11 86 84 AD09 TOT1 P12 87 85 AD10 SIN3 INT11R P13 88 86 AD11 SOT3 P14 89 87 AD12 SCK3 90 91 92 93 88 89 90 91 VCC VSS X1 X0 P15 94 92 AD13 P16 95 93 AD14 G G A G G N G
I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data input pin for UART3 External interrupt request input pin General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data output pin for UART3 General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Clock I/O pin for UART3 Power (3.5 V to 5.5 V) input pin GND pin Main clock output pin Main clock input pin General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. (Continued)
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MB90340E Series
I/O CIRCUIT TYPE
Type
X1
Circuit
Remarks Oscillation circuit High-speed oscillation feedback resistor = approx. 1 M
Xout
A
X0
Standby control signal
X1A
Xout
Oscillation circuit Low-speed oscillation feedback resistor = approx. 10 M
B
X0A
Standby control signal R
C
CMOS hysteresis inputs
* MASK ROM and evaluation products: CMOS hysteresis input pin * Flash memory products: CMOS input pin MASK ROM and evaluation products: * CMOS hysteresis input pin * Pull-down resistor value: approx. 50 k Flash memory products: * CMOS input pin * No pull-down
R
CMOS hysteresis inputs
D
Pull-down Resistor
CMOS hysteresis input pin Pull-up resistor value: approx. 50 k E
Pull-up Resistor R CMOS hysteresis inputs
(Continued)
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MB90340E Series
Type
Circuit
Remarks * CMOS level output (IOL = 4 mA, IOH = S 4 mA) * CMOS hysteresis input (with function to disconnect input during standby) * Automotive input (with function to disconnect input during standby)
P-ch
Pout
N-ch
Nout
F
R CMOS hysteresis input Automotive input Standby control for input shutdown Pull-up control P-ch
P-ch
Pout
N-ch
Nout
G
R CMOS hysteresis input Automotive input TTL input Standby control for input shutdown
* CMOS level output (IOL = 4 mA, IOH = S 4 mA) * CMOS hysteresis input (with function to disconnect input during standby) * Automotive input (with function to disconnect input during standby) * TTL input (with function to disconnect input during standby) * Programmable pull-up resistor: 50 k approx.
P-ch
Pout
N-ch
Nout
H
R CMOS hysteresis input Automotive input Standby control for input shutdown
* CMOS level output (IOL = 3 mA, IOH = S 3 mA) * CMOS hysteresis input (with function to disconnect input during standby) * Automotive input (with function to disconnect input during standby)
(Continued)
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MB90340E Series
HANDLING DEVICES
1. Preventing latch-up
CMOS IC may suffer latch-up under the following conditions: * A voltage higher than VCC or lower than VSS is applied to an input or output pin. * A voltage higher than the rated voltage is applied between VCC and VSS pins. * The AVCC power supply is applied before the VCC voltage. Latch-up may increase the power supply current drastically, causing thermal damage to the device. For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digital power-supply voltage.
2. Handling unused pins
Leaving unused input terminals open may lead to permanent damage due to malfunction and latch-up; pull up or pull down the terminals through the resistors of 2 k or more.
3. Power supply pins (VCC/VSS)
* If there are multiple VCC and VSS pins, from the point of view of device design, pins to be of the same potential are connected inside of the device to prevent malfunction such as latch-up. To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level, and observe the standard for total output current, be sure to connect the VCC and VSS pins to the power supply and ground externally. Connect VCC and VSS pins to the device from the current supply source at a possibly low impedance. * As a measure against power supply noise, it is recommended to connect a capacitor of about 0.1 F as a bypass capacitor between VCC and VSS pins in the vicinity of VCC and VSS pins of the device. Vcc Vss
Vss Vcc
Vcc
Vss
MB90340E Series
Vcc Vss
Vss
Vcc
4. Mode Pins (MD0 to MD2)
Connect the mode pins directly to VCC or VSS pins. To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to VCC or VSS pins and to provide a low-impedance connection.
24
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MB90340E Series
13. Stabilization of power supply voltage
A sudden change in the supply voltage may cause the device to malfunction even within the VCC supply voltage operating range. Therefore, the VCC supply voltage should be stabilized. For reference, the supply voltage should be controlled so that VCC ripple variations (peak- to-peak values) at commercial frequencies (50 MHz/60 MHz) fall below 10% of the standard VCC supply voltage and the coefficient of fluctuation does not exceed 0.1 V/ms at instantaneous power switching.
14. Port 0 to Port 3 Output During Power-on (External-bus Mode)
As shown below, when the power is turned on in External-Bus mode, there is a possibility that output signal of Port 0 to Port 3 might be unstable irrespective of the reset input.
1/2VCC VCC
Port0 to Port3
Port0 to Port3 outputs might be unstable Port0 to Port3 outputs = Hi-Z
15. Notes on Using the CAN Function
To use the CAN function, please set the DIRECT bit of the CAN Direct Mode Register (CDMR) to 1.
16. Flash Security Function (except for MB90F346E)
A security bit is located in the area of the flash memory. If protection code 01H is written in the security bit, the flash memory is in the protected state by security. Therefore please do not write 01H in this address if you do not use the security function. Refer to following table for the address of the security bit. Flash memory size MB90F347E MB90F342E MB90F349E MB90F345E Embedded 1 Mbit Flash Memory Embedded 2 Mbits Flash Memory Embedded 4 Mbits Flash Memory Address of the security bit FE0001H FC0001H F80001H
17. Serial Communication
There is a possibility to receive wrong data due to the noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Retransmit the data if an error occurs because of applying the checksum to the last data in consideration of receiving wrong data due to the noise.
26
DS07-13747-4E
MB90340E Series
BLOCK DIAGRAMS
* MB90V340E-101/102
X0,X1 X0A,X1A* RST
Clock Controller
16LX CPU
RAM 30 Kbytes
Free-run Timer 0 Input Capture 8 channels Output Compare 8 channels
FRCK0 IN7 to IN0
OUT7 to OUT0
Prescaler 5 channels SOT4 to SOT0 SCK4 to SCK0 SIN4 to SIN0 AVCC AVSS AN23 to AN0 AVRH AVRL ADTG
Free-run Timer 1 CAN Controller 3 channels
16-bit Reload Timer 4 channels
FRCK1
LIN-UART 5 channels
RX2 to RX0 TX2 to TX0
8/10-bit A/D converter 24 channels
F2MC-16 Bus
TIN3 to TIN0 TOT3 to TOT0 AD15 to AD00 A23 to A16 ALE RD WR/WRL WRH HRQ HAK RDY CLK
DA01, DA00
10-bit D/A converter 2 channels 8/16-bit PPG 16/8 channels I2C Interface 2 channels
DMAC
External Bus Interface
PPGF to PPG0
SDA1, SDA0 SCL1, SCL0
External Interrupt 16 channels Clock Monitor
INT15 to INT8 (INT15R to INT8R) INT7 to INT0 CKOT
* : Only for MB90V340E-102
DS07-13747-4E
27
MB90340E Series
MB90342E(S)/342CE(S) MB90F342E(S)/F342CE(S) MB90349E(S)/349CE(S) MB90F349E(S)/F349CE(S)
000000H 0000EFH 000100H RAM 16 Kbytes Peripheral
External access area
MB90341E(S)/341CE(S) MB90348E(S)/348CE(S)
000000H 0000EFH 000100H RAM 16 Kbytes Peripheral
External access area
MB90347E(S)/347CE(S) MB90F347E(S)/F347CE(S)
000000H 0000EFH 000100H 0018FFH Peripheral
External access area
MB90346E(S)/346CE(S) MB90F346E(S)/F346CE(S)
000000H 0000EFH 000100H 0008FFH Peripheral
External access area
RAM 6 Kbytes
RAM 2 Kbytes
003FFFH
003FFFH
007900H 007FFFH 008000H 00FFFFH Peripheral ROM (image of FF bank)
007900H 007FFFH 008000H 00FFFFH Peripheral ROM (image of FF bank)
007900H 007FFFH 008000H 00FFFFH Peripheral ROM (image of FF bank)
007900H 007FFFH 008000H 00FFFFH Peripheral ROM (image of FF bank)
External access area
External access area
External access area
External access area
FC0000H FCFFFFH FD0000H FDFFFFH FE0000H FEFFFFH FF0000H FFFFFFH ROM (FC bank) ROM (FD bank) ROM (FE bank) ROM (FF bank) FE0000H FEFFFFH FF0000H FFFFFFH ROM (FE bank) ROM (FF bank) FE0000H FEFFFFH FF0000H FFFFFFH ROM (FE bank) ROM (FF bank) FE0000H FEFFFFH FF0000H FFFFFFH
ROM (FF bank)
: Not accessible
Note: An image of the data in the FF bank of ROM is visible in the upper part of bank 00, which makes it possible for the C compiler to use the small memory model. The lower 16 bits of addresses in the FF bank are the same as the lower 16 bits of addresses in the 00 bank so that tables stored in the ROM can be accessed without using the far specifier in the pointer declaration. For example, when the address 00C000H is accessed, the data at FFC000H in ROM is actually accessed. The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00. As a result, the image between FF8000H and FFFFFFH is visible in bank 00, while the image between FF0000H and FF7FFFH is visible only in bank FF.
30
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I/O MAP
Address Register Abbreviation PDR0 PDR1 PDR2 PDR3 PDR4 PDR5 PDR6 PDR7 PDR8 PDR9 PDRA ADER5 ADER6 ADER7 ILSR0 ILSR1 DDR0 DDR1 DDR2 DDR3 DDR4 DDR5 DDR6 DDR7 DDR8 DDR9 DDRA Reserved PUCR0 PUCR1 PUCR2 PUCR3 R/W R/W R/W W, R/W Port 0 Port 1 Port 2 Port 3 00000000B 00000000B 00000000B 00000000B (Continued) Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Resource name Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port A Port 5, A/D Port 6, A/D Port 7, A/D Ports Ports Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port A Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 11111111B 11111111B 11111111B XXXXXXXXB XXXX0XXXB 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000100B 000000H Port 0 Data Register 000001H Port 1 Data Register 000002H Port 2 Data Register 000003H Port 3 Data Register 000004H Port 4 Data Register 000005H Port 5 Data Register 000006H Port 6 Data Register 000007H Port 7 Data Register 000008H Port 8 Data Register 000009H Port 9 Data Register 00000AH Port A Data Register 00000BH Port 5 Analog Input Enable Register 00000CH Port 6 Analog Input Enable Register 00000DH Port 7 Analog Input Enable Register 00000EH Input Level Select Register 0 00000FH Input Level Select Register 1 000010H Port 0 Direction Register 000011H Port 1 Direction Register 000012H Port 2 Direction Register 000013H Port 3 Direction Register 000014H Port 4 Direction Register 000015H Port 5 Direction Register 000016H Port 6 Direction Register 000017H Port 7 Direction Register 000018H Port 8 Direction Register 000019H Port 9 Direction Register 00001AH Port A Direction Register 00001BH 00001CH Port 0 Pull-up Control Register 00001DH Port 1 Pull-up Control Register 00001EH Port 2 Pull-up Control Register 00001FH Port 3 Pull-up Control Register
DS07-13747-4E
31
MB90340E Series
Address
Register
Abbreviation Access Resource name Initial value SMR0 SCR0 RDR0/TDR0 SSR0 ECCR0 ESCR0 BGR00 BGR01 SMR1 SCR1 RDR1/TDR1 SSR1 ECCR1 ESCR1 BGR10 BGR11 PPGC0 PPGC1 PPG01 Reserved PPGC2 PPGC3 PPG23 Reserved PPGC4 PPGC5 PPG45 PACSR1 PPGC6 PPGC7 PPG67 Reserved (Continued) W,R/W W,R/W R/W R/W W,R/W W,R/W R/W 16-bit PPG 6/7 Address Match Detection 1 16-bit PPG 4/5 0X000XX1B 0X000001B 000000X0B 00000000B 0X000XX1B 0X000001B 000000X0B W,R/W W,R/W R/W 16-bit PPG 2/3 0X000XX1B 0X000001B 000000X0B W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W W,R/W W,R/W R/W 16-bit PPG 0/1 UART1 UART0 00000000B 00000000B 00000000B 00001000B 000000XXB 00000100B 00000000B 00000000B 00000000B 00000000B 00000000B 00001000B 000000XXB 00000100B 00000000B 00000000B 0X000XX1B 0X000001B 000000X0B
000020H Serial Mode Register 0 000021H Serial Control Register 0 000022H Reception/Transmission Data Register 0 000023H Serial Status Register 0 000024H Extended Communication Control Register 0
000025H Extended Status/Control Register 0 000026H Baud Rate Generator Register 00 000027H Baud Rate Generator Register 01 000028H Serial Mode Register 1 000029H Serial Control Register 1 00002AH Reception/Transmission Data Register 1 00002BH Serial Status Register 1 00002CH Extended Communication Control Register 1
00002DH Extended Status/Control Register 1 00002EH Baud Rate Generator Register 10 00002FH Baud Rate Generator Register 11 000030H PPG 0 Operation Mode Control Register 000031H PPG 1 Operation Mode Control Register 000032H PPG 0/PPG 1 Count Clock Select Register 000033H 000034H PPG 2 Operation Mode Control Register 000035H PPG 3 Operation Mode Control Register 000036H PPG 2/PPG 3 Count Clock Select Register 000037H 000038H PPG 4 Operation Mode Control Register 000039H PPG 5 Operation Mode Control Register 00003AH PPG 4/PPG 5 Clock Select Register 00003BH Address Detect Control Register 1 00003CH PPG 6 Operation Mode Control Register 00003DH PPG 7 Operation Mode Control Register 00003EH PPG 6/PPG 7 Count Clock Control Register 00003FH
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DS07-13747-4E
MB90340E Series
Address
Register
Abbreviation Access PPGC8 PPGC9 PPG89 Reserved PPGCA PPGCB PPGAB Reserved PPGCC PPGCD PPGCD Reserved PPGCE PPGCF PPGEF Reserved ICS01 ICE01 ICS23 ICE23 ICS45 ICE45 ICS67 ICE67 OCS0 OCS1 OCS2 OCS3 OCS4 OCS5 OCS6 OCS7 R/W R/W, R R/W R R/W R R/W R/W, R R/W R/W R/W R/W R/W R/W R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W
Resource name
Initial value 0X000XX1B 0X000001B 000000X0B
000040H PPG 8 Operation Mode Control Register 000041H PPG 9 Operation Mode Control Register 000042H 000043H 000044H PPG A Operation Mode Control Register 000045H PPG B Operation Mode Control Register 000046H 000047H 000048H PPG C Operation Mode Control Register 000049H PPG D Operation Mode Control Register 00004AH 00004BH 00004CH PPG E Operation Mode Control Register 00004DH PPG F Operation Mode Control Register 00004EH 00004FH 000050H Input Capture Control Status 0/1 000051H Input Capture Edge 0/1 000052H Input Capture Control Status 2/3 000053H Input Capture Edge 2/3 000054H Input Capture Control Status 4/5 000055H Input Capture Edge 4/5 000056H Input Capture Control Status 6/7 000057H Input Capture Edge 6/7 000058H Output Compare Control Status 0 000059H Output Compare Control Status 1 00005AH Output Compare Control Status 2 00005BH Output Compare Control Status 3 00005CH Output Compare Control Status 4 00005DH Output Compare Control Status 5 00005EH Output Compare Control Status 6 00005FH Output Compare Control Status 7 PPG E/PPG F Count Clock Select Register PPG C/PPG D Count Clock Select Register PPG A/PPG B Count Clock Select Register PPG 8/PPG 9 Count Clock Control Register
16-bit PPG 8/9
0X000XX1B 16-bit PPG A/B 0X000001B 000000X0B
0X000XX1B 16-bit PPG C/D 0X000001B 000000X0B
0X000XX1B 16-bit PPG E/F 0X000001B 000000X0B
Input Capture 0/1 Input Capture 2/3 Input Capture 4/5 Input Capture 6/7 Output Compare 0/1 Output Compare 2/3 Output Compare 4/5 Output Compare 6/7
00000000B XXX0X0XXB 00000000B XXXXXXXXB 00000000B XXXXXXXXB 00000000B XXX000XXB 0000XX00B 0XX00000B 0000XX00B 0XX00000B 0000XX00B 0XX00000B 0000XX00B 0XX00000B (Continued)
DS07-13747-4E
33
MB90340E Series
Address
Register
Abbreviation TMCSR0 TMCSR0 TMCSR1 TMCSR1 TMCSR2 TMCSR2 TMCSR3 TMCSR3 ADCS0 ADCS1 ADCR0 ADCR1 ADSR0 ADSR1 Reserved ROMM
Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R/W R/W W
Resource name 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3
Initial value 00000000B XXXX0000B 00000000B XXXX0000B 00000000B XXXX0000B 00000000B XXXX0000B 000XXXX0B 0000000XB 00000000B XXXXXX00B 00000000B 00000000B
000060H Timer Control Status 0 000061H Timer Control Status 0 000062H Timer Control Status 1 000063H Timer Control Status 1 000064H Timer Control Status 2 000065H Timer Control Status 2 000066H Timer Control Status 3 000067H Timer Control Status 3 000068H A/D Control Status 0 000069H A/D Control Status 1 00006AH A/D Data 0 00006BH A/D Data 1 00006CH ADC Setting 0 00006DH ADC Setting 1 00006EH 00006FH ROM Mirror Function Select 000070H to 00008FH 000090H to 00009AH 00009BH DMA Descriptor Channel Specified Register
A/D Converter
ROM Mirror
XXXXXXX1B
Reserved for CAN Controller 0/1. Refer to " CAN CONTROLLERS"
Reserved DCSR DSRL DSRH PACSR0 DIRR LPMCR CKSCR Reserved DSSR R/W DMA 00000000B (Continued) R/W R/W R/W R/W R/W W,R/W R,R/W Address Match Detection 0 DMA 00000000B 00000000B 00000000B 00000000B
00009CH DMA Status L Register 00009DH DMA Status H Register 00009EH Address Detect Control Register 0 00009FH Delayed Interrupt Trigger/Release Register
Delayed Interrupt XXXXXXX0B Low Power Control Circuit Low Power Control Circuit 00011000B 11111100B
0000A0H Low-power Mode Control Register 0000A1H Clock Selection Register 0000A2H, 0000A3H 0000A4H DMA Stop Status Register
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DS07-13747-4E
MB90340E Series
Address 0000A5H 0000A6H
Register Automatic Ready Function Select Register External Address Output Control Register
Abbreviation ARSR HACR ECSR WDTC TBTC WTC Reserved DERL DERH FMCS Reserved ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 ICR12 ICR13 ICR14 ICR15 DAT0 DAT1 DACR0 DACR1
Access W W W R,W W,R/W R,R/W R/W R/W R,R/W
Resource name
Initial value 0011XX00B
External Memory Access
00000000B 0000000XB
0000A7H Bus Control Signal Selection Register 0000A8H Watchdog Control Register 0000A9H Time Base Timer Control Register 0000AAH Watch Timer Control Register 0000ABH 0000ACH DMA Enable L Register 0000ADH DMA Enable H Register 0000AEH 0000AFH 0000B0H Interrupt Control Register 00 0000B1H Interrupt Control Register 01 0000B2H Interrupt Control Register 02 0000B3H Interrupt Control Register 03 0000B4H Interrupt Control Register 04 0000B5H Interrupt Control Register 05 0000B6H Interrupt Control Register 06 0000B7H Interrupt Control Register 07 0000B8H Interrupt Control Register 08 0000B9H Interrupt Control Register 09 0000BAH Interrupt Control Register 10 0000BBH Interrupt Control Register 11 0000BCH Interrupt Control Register 12 0000BDH Interrupt Control Register 13 0000BEH Interrupt Control Register 14 0000BFH Interrupt Control Register 15 0000C0H D/A Converter Data 0 0000C1H D/A Converter Data 1 0000C2H D/A Control 0 0000C3H D/A Control 1 Flash Control Status Register (Flash memory devices only. Otherwise reserved)
Watchdog Timer Time Base Timer Watch Timer
XXXXX111B 1XX00100B 1X001000B 00000000B 00000000B 000X0000B
DMA Flash Memory
W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W R/W R/W R/W R/W D/A Converter Interrupt Control
00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B XXXXXXXXB XXXXXXXXB XXXXXXX0B XXXXXXX0B (Continued)
DS07-13747-4E
35
MB90340E Series
Address 0000C4H, 0000C5H
Register
Abbreviation Access Reserved ENIR0 EIRR0 ELVR0 ELVR0 ENIR1 EIRR1 ELVR1 ELVR1 EISSR PSCCR BAPL BAPM BAPH DMACS IOAL IOAH DCTL DCTH SMR2 SCR2 RDR2/TDR2 SSR2 ECCR2 ESCR2 BGR20 BGR21 R/W R/W R/W R/W R/W R/W R/W R/W R/W W R/W R/W R/W R/W R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W
Resource name
Initial value
0000C6H External Interrupt Enable 0 0000C7H External Interrupt Source 0 0000C8H External Interrupt Level Setting 0 0000C9H External Interrupt Level Setting 0 0000CAH External Interrupt Enable 1 0000CBH External Interrupt Source 1 0000CCH External Interrupt Level Setting 1 0000CDH External Interrupt Level Setting 1 0000CEH External Interrupt Source Select 0000CFH PLL/Sub clock Control Register 0000D0H DMA Buffer Address Pointer L Register 0000D1H DMA Buffer Address Pointer M Register 0000D2H DMA Buffer Address Pointer H Register 0000D3H DMA Control Register 0000D4H 0000D5H I/O Register Address Pointer L Register I/O Register Address Pointer H Register
00000000B External Interrupt 0 XXXXXXXXB 00000000B 00000000B 00000000B XXXXXXXXB External Interrupt 1 00000000B 00000000B 00000000B PLL XXXX0000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB DMA XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000000B 00000000B 00000000B UART2 00001000B 000000XXB 00000100B 00000000B 00000000B
0000D6H Data Counter L Register 0000D7H Data Counter H Register 0000D8H Serial Mode Register 2 0000D9H Serial Control Register 2 0000DAH Reception/Transmission Data Register 2 Extended Communication Control Register 2
0000DBH Serial Status Register 2 0000DCH
0000DDH Extended Status Control Register 2 0000DEH Baud Rate Generator Register 20 0000DFH Baud Rate Generator Register 21 0000E0H to 0000EFH 0000F0H to 0000FFH
Reserved for CAN Controller 2. Refer to " CAN CONTROLLERS"
External (Continued)
36
DS07-13747-4E
MB90340E Series
Address 007900H 007901H 007902H 007903H 007904H 007905H 007906H 007907H 007908H 007909H 00790AH 00790BH
Register Reload Register L0 Reload Register H0 Reload Register L1 Reload Register H1 Reload Register L2 Reload Register H2 Reload Register L3 Reload Register H3 Reload Register L4 Reload Register H4 Reload Register L5 Reload Register H5
Abbreviation PRLL0 PRLH0 PRLL1 PRLH1 PRLL2 PRLH2 PRLL3 PRLH3 PRLL4 PRLH4 PRLL5 PRLH5 PRLL6 PRLH6 PRLL7 PRLH7 PRLL8 PRLH8 PRLL9 PRLH9 PRLLA PRLHA PRLLB PRLHB PRLLC PRLHC PRLLD PRLHD PRLLE PRLHE PRLLF PRLHF IPCP0 IPCP0 IPCP1 IPCP1
Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R
Resource name
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB (Continued)
16-bit PPG 0/1
16-bit PPG 2/3
16-bit PPG 4/5
00790CH Reload Register L6 00790DH Reload Register H6 00790EH 00790FH 007910H 007911H 007912H 007913H 007914H 007915H 007916H 007917H 007918H 007919H 00791AH 00791BH Reload Register L7 Reload Register H7 Reload Register L8 Reload Register H8 Reload Register L9 Reload Register H9 Reload Register LA Reload Register HA Reload Register LB Reload Register HB Reload Register LC Reload Register HC Reload Register LD Reload Register HD
16-bit PPG 6/7
16-bit PPG 8/9
16-bit PPG A/B
16-bit PPG C/D
00791CH Reload Register LE 00791DH Reload Register HE 00791EH 00791FH 007920H 007921H 007922H 007923H Reload Register LF Reload Register HF Input Capture 0 Input Capture 0 Input Capture 1 Input Capture 1
16-bit PPG E/F
Input Capture 0/1
DS07-13747-4E
37
MB90340E Series
Address
Register
Abbreviation IPCP2 IPCP2 IPCP3 IPCP3 IPCP4 IPCP4 IPCP5 IPCP5 IPCP6 IPCP6 IPCP7 IPCP7 OCCP0 OCCP0 OCCP1 OCCP1 OCCP2 OCCP2 OCCP3 OCCP3 OCCP4 OCCP4 OCCP5 OCCP5 OCCP6 OCCP6 OCCP7 OCCP7 TCDT0 TCDT0 TCCSL0 TCCSH0 TCDT1 TCDT1 TCCSL1 TCCSH1
Access R R R R R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Resource name
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000000B 00000000B 00000000B 0XXXXXXXB 00000000B 00000000B 00000000B 0XXXXXXXB (Continued)
007924H Input Capture 2 007925H Input Capture 2 007926H Input Capture 3 007927H Input Capture 3 007928H Input Capture 4 007929H Input Capture 4 00792AH Input Capture 5 00792BH Input Capture 5 00792CH Input Capture 6 00792DH Input Capture 6 00792EH Input Capture 7 00792FH Input Capture 7 007930H Output Compare 0 007931H Output Compare 0 007932H Output Compare 1 007933H Output Compare 1 007934H Output Compare 2 007935H Output Compare 2 007936H Output Compare 3 007937H Output Compare 3 007938H Output Compare 4 007939H Output Compare 4 00793AH Output Compare 5 00793BH Output Compare 5 00793CH Output Compare 6 00793DH Output Compare 6 00793EH Output Compare 7 00793FH Output Compare 7 007940H Timer Data 0 007941H Timer Data 0 007942H Timer Control Status 0 007943H Timer Control Status 0 007944H Timer Data 1 007945H Timer Data 1 007946H Timer Control Status 1 007947H Timer Control Status 1
Input Capture 2/3
Input Capture 4/5
Input Capture 6/7
Output Compare 0/1
Output Compare 2/3
Output Compare 4/5
Output Compare 6/7
Free-run Timer 0
Free-run Timer 1
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DS07-13747-4E
MB90340E Series
Address 007948H 007949H 00794AH 00794BH 00794CH 00794DH 00794EH 00794FH
Register Timer 0/Reload 0 Timer 1/Reload 1 Timer 2/Reload 2 Timer 3/Reload 3
Abbreviation Access TMR0/ TMRLR0 TMR1/ TMRLR1 TMR2/ TMRLR2 TMR3/ TMRLR3 SMR3 SCR3 RDR3/TDR3 SSR3 ECCR3 ESCR3 BGR30 BGR31 SMR4 SCR4 RDR4/TDR4 SSR4 ECCR4 ESCR4 BGR40 BGR41 Reserved CLKR Reserved CDMR CANSWR R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W
Resource name 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000000B 00000000B 00000000B
007950H Serial Mode Register 3 007951H Serial Control Register 3 007952H Reception/Transmission Data Register 3 Extended Communication Control Register 3
007953H Serial Status Register 3 007954H
UART3
00001000B 000000XXB 00000100B 00000000B 00000000B 00000000B 00000000B 00000000B
007955H Extended Status Control Register 007956H Baud Rate Generator Register 30 007957H Baud Rate Generator Register 31 007958H Serial Mode Register 4 007959H Serial Control Register 4 00795AH Reception/Transmission Data Register 4 Extended Communication Control Register 4
00795BH Serial Status Register 4 00795CH
UART4
00001000B 000000XXB 00000100B 00000000B 00000000B
00795DH Extended Status Control Register 00795EH Baud Rate Generator Register 40 00795FH Baud Rate Generator Register 41 007960H to 00796BH 00796CH Clock Output Enable Register 00796DH 00796EH CAN Direct Mode Register 00796FH CAN Switch Register
Clock Monitor CAN Clock sync CAN 0/1
XXXX0000B XXXXXXX0B XXXXXX00B (Continued)
DS07-13747-4E
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MB90340E Series
Address
2
Register
Abbreviation IBSR0 IBCR0 ITBAL0 ITBAH0 ITMKL0 ITMKH0 ISBA0 ISMK0 IDAR0 Reserved ICCR0 Reserved IBSR1 IBCR1 ITBAL1 ITBAH1 ITMKL1 ITMKH1 ISBA1 ISMK1 IDAR1 Reserved ICCR1 Reserved CMCR Reserved
Access R W,R/W R/W R/W R/W R/W R/W R/W R/W
Resource name
Initial value 00000000B 00000000B 00000000B 00000000B
007970H I C Bus Status Register 0 007971H I2C Bus Control Register 0 007972H 007973H I2C 10-bit Slave Address Register 0
2
007974H I C 10-bit Slave Address Mask 007975H Register 0 007976H I C 7-bit Slave Address Register 0
2 2 2
I C Interface 0
2
11111111B 00111111B 00000000B 01111111B 00000000B
007977H I C 7-bit Slave Address Mask Register 0 007978H I C Data Register 0 007979H, 00797AH 00797BH I2C Clock Control Register 0 00797CH to 00797FH 007980H I2C Bus Status Register 1 007981H I C Bus Control Register 1
2
R/W
I2C Interface 0
00011111B
R W,R/W R/W R/W R/W R/W R/W R/W R/W I C Interface 1
2
00000000B 00000000B 00000000B 00000000B 11111111B 00111111B 00000000B 01111111B 00000000B
007982H 007983H
I2C 10-bit Slave Address Register 1
007984H I2C 10-bit Slave Address Mask 007985H Register 1 007986H I2C 7-bit Slave Address Register 1 007987H I2C 7-bit Slave Address Mask Register 1 007988H I C Data Register 1
2
007989H, 00798AH 00798BH I2C Clock Control Register 1 00798CH to 0079C1H 0079C2H Clock Modulator Control Register 0079C3H to 0079DFH
R/W
I2C Interface 1
00011111B
R, R/W
Clock Modulator
0001X000B
(Continued)
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(Continued) Address Register Abbreviation Access Resource name 0079E0H Detect Address Setting 0 PADR0 R/W 0079E1H Detect Address Setting 0 PADR0 R/W 0079E2H Detect Address Setting 0 PADR0 R/W 0079E3H Detect Address Setting 1 PADR1 R/W Address Match 0079E4H Detect Address Setting 1 PADR1 R/W Detection 0 0079E5H Detect Address Setting 1 PADR1 R/W 0079E6H Detect Address Setting 2 PADR2 R/W 0079E7H Detect Address Setting 2 PADR2 R/W 0079E8H Detect Address Setting 2 PADR2 R/W 0079E9H to Reserved 0079EFH 0079F0H Detect Address Setting 3 PADR3 R/W 0079F1H Detect Address Setting 3 PADR3 R/W 0079F2H Detect Address Setting 3 PADR3 R/W 0079F3H Detect Address Setting 4 PADR4 R/W Address Match 0079F4H Detect Address Setting 4 PADR4 R/W Detection 1 0079F5H Detect Address Setting 4 PADR4 R/W 0079F6H Detect Address Setting 5 PADR5 R/W 0079F7H Detect Address Setting 5 PADR5 R/W 0079F8H Detect Address Setting 5 PADR5 R/W 0079F9H to Reserved 0079FFH 007A00H to Reserved for CAN Controller 0. Refer to " CAN CONTROLLERS" 007AFFH 007B00H to Reserved for CAN Controller 0. Refer to " CAN CONTROLLERS" 007BFFH 007C00H to Reserved for CAN Controller 1. Refer to " CAN CONTROLLERS" 007CFFH 007D00H to Reserved for CAN Controller 1. Refer to " CAN CONTROLLERS" 007DFFH 007E00H to Reserved 007FFFH
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
Notes : Initial value of "X" represents unknown value. Any write access to reserved addresses in I/O map should not be performed. A read access to reserved addresses results in reading "X".
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MB90340E Series
CAN CONTROLLERS
The CAN controller has the following features: * Conforms to CAN Specification Version 2.0 Part A and B Supports transmission/reception in standard frame and extended frame formats * Supports transmission of data frames by receiving remote frames * 16 transmission/reception message buffers 29-bit ID and 8-byte data Multi-level message buffer configuration * Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message buffer as ID acceptance mask Two acceptance mask registers in either standard frame format or extended frame formats * Bit rate programmable from 10 kbps to 2 Mbps (when input clock is at 16 MHz) List of Control Registers (1) Address CAN0 000070H 000071H 000072H 000073H 000074H 000075H 000076H 000077H 000078H 000079H 00007AH 00007BH 00007CH 00007DH 00007EH 00007FH CAN1 000080H 000081H 000082H 000083H 000084H 000085H 000086H 000087H 000088H 000089H 00008AH 00008BH 00008CH 00008DH 00008EH 00008FH Register Message Buffer Valid Register Transmit Request Register Transmit Cancel Register Transmission Complete Register Receive Complete Register Remote Request Receiving Register Receive Overrun Register Reception Interrupt Enable Register Abbreviation BVALR TREQR TCANR TCR RCR RRTRR ROVRR RIER Access R/W R/W W R/W R/W R/W R/W R/W Initial Value 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B
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List of Control Registers (2) Address CAN0 007B00H 007B01H 007B02H 007B03H 007B04H 007B05H 007B06H 007B07H 007B08H 007B09H 007B0AH 007B0BH 007B0CH 007B0DH 007B0EH 007B0FH 007B10H 007B11H 007B12H 007B13H 007B14H 007B15H 007B16H 007B17H 007B18H 007B19H 007B1AH 007B1BH CAN1 007D00H 007D01H 007D02H 007D03H 007D04H 007D05H 007D06H 007D07H 007D08H 007D09H 007D0AH 007D0BH 007D0CH 007D0DH 007D0EH 007D0FH 007D10H 007D11H 007D12H 007D13H 007D14H 007D15H 007D16H 007D17H 007D18H 007D19H 007D1AH 007D1BH Acceptance Mask Register 1 AMR1 R/W Acceptance Mask Register 0 AMR0 R/W Acceptance Mask Select Register AMSR R/W Register Control Status Register Last Event Indicator Register Receive And Transmit Error Counter Bit Timing Register IDE Register Transmit RTR Register Remote Frame Receive Waiting Register Transmit Interrupt Enable Register Abbreviation CSR LEIR RTEC BTR IDER TRTRR RFWTR TIER Access R/W, W R/W, R R/W R R/W R/W R/W R/W R/W Initial Value 0XXXX0X1B 00XXX000B 000X0000B XXXXXXXXB 00000000B 00000000B 11111111B X1111111B XXXXXXXXB XXXXXXXXB 00000000B 00000000B XXXXXXXXB XXXXXXXXB 00000000B 00000000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
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MB90340E Series
List of Message Buffers (ID Registers) (1) Address CAN0 007A00H to 007A1FH 007A20H 007A21H 007A22H 007A23H 007A24H 007A25H 007A26H 007A27H 007A28H 007A29H 007A2AH 007A2BH 007A2CH 007A2DH 007A2EH 007A2FH 007A30H 007A31H 007A32H 007A33H 007A34H 007A35H 007A36H 007A37H 007A38H 007A39H 007A3AH 007A3BH 007A3CH 007A3DH 007A3EH 007A3FH 44 CAN1 007C00H to 007C1FH 007C20H 007C21H 007C22H 007C23H 007C24H 007C25H 007C26H 007C27H 007C28H 007C29H 007C2AH 007C2BH 007C2CH 007C2DH 007C2EH 007C2FH 007C30H 007C31H 007C32H 007C33H 007C34H 007C35H 007C36H 007C37H 007C38H 007C39H 007C3AH 007C3BH 007C3CH 007C3DH 007C3EH 007C3FH ID Register 7 IDR7 R/W ID Register 6 IDR6 R/W ID Register 5 IDR5 R/W ID Register 4 IDR4 R/W ID Register 3 IDR3 R/W ID Register 2 IDR2 R/W ID Register 1 IDR1 R/W ID Register 0 IDR0 R/W Register GeneralPurpose RAM Abbreviation Access Initial Value XXXXXXXXB to XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB DS07-13747-4E
R/W
MB90340E Series
List of Message Buffers (ID Registers) (2) Address CAN0 007A40H 007A41H 007A42H 007A43H 007A44H 007A45H 007A46H 007A47H 007A48H 007A49H 007A4AH 007A4BH 007A4CH 007A4DH 007A4EH 007A4FH 007A50H 007A51H 007A52H 007A53H 007A54H 007A55H 007A56H 007A57H 007A58H 007A59H 007A5AH 007A5BH 007A5CH 007A5DH 007A5EH 007A5FH CAN1 007C40H 007C41H 007C42H 007C43H 007C44H 007C45H 007C46H 007C47H 007C48H 007C49H 007C4AH 007C4BH 007C4CH 007C4DH 007C4EH 007C4FH 007C50H 007C51H 007C52H 007C53H 007C54H 007C55H 007C56H 007C57H 007C58H 007C59H 007C5AH 007C5BH 007C5CH 007C5DH 007C5EH 007C5FH ID Register 15 IDR15 R/W ID Register 14 IDR14 R/W ID Register 13 IDR13 R/W ID Register 12 IDR12 R/W ID Register 11 IDR11 R/W ID Register 10 IDR10 R/W ID Register 9 IDR9 R/W ID Register 8 IDR8 R/W Register Abbreviation Access Initial Value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
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MB90340E Series
List of Message Buffers (DLC Registers and Data Registers) (1) Address CAN0 007A60H 007A61H 007A62H 007A63H 007A64H 007A65H 007A66H 007A67H 007A68H 007A69H 007A6AH 007A6BH 007A6CH 007A6DH 007A6EH 007A6FH 007A70H 007A71H 007A72H 007A73H 007A74H 007A75H 007A76H 007A77H 007A78H 007A79H 007A7AH 007A7BH 007A7CH 007A7DH 007A7EH 007A7FH CAN1 007C60H 007C61H 007C62H 007C63H 007C64H 007C65H 007C66H 007C67H 007C68H 007C69H 007C6AH 007C6BH 007C6CH 007C6DH 007C6EH 007C6FH 007C70H 007C71H 007C72H 007C73H 007C74H 007C75H 007C76H 007C77H 007C78H 007C79H 007C7AH 007C7BH 007C7CH 007C7DH 007C7EH 007C7FH Register DLC Register 0 DLC Register 1 DLC Register 2 DLC Register 3 DLC Register 4 DLC Register 5 DLC Register 6 DLC Register 7 DLC Register 8 DLC Register 9 DLC Register 10 DLC Register 11 DLC Register 12 DLC Register 13 DLC Register 14 DLC Register 15 Abbreviation DLCR0 DLCR1 DLCR2 DLCR3 DLCR4 DLCR5 DLCR6 DLCR7 DLCR8 DLCR9 DLCR10 DLCR11 DLCR12 DLCR13 DLCR14 DLCR15 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial Value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
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List of Message Buffers (DLC Registers and Data Registers) (2) Address CAN0 007A80H to 007A87H 007A88H to 007A8FH 007A90H to 007A97H 007A98H to 007A9FH 007AA0H to 007AA7H 007AA8H to 007AAFH 007AB0H to 007AB7H 007AB8H to 007ABFH 007AC0H to 007AC7H 007AC8H to 007ACFH 007AD0H to 007AD7H 007AD8H to 007ADFH 007AE0H to 007AE7H 007AE8H to 007AEFH CAN1 007C80H to 007C87H 007C88H to 007C8FH 007C90H to 007C97H 007C98H to 007C9FH 007CA0H to 007CA7H 007CA8H to 007CAFH 007CB0H to 007CB7H 007CB8H to 007CBFH 007CC0H to 007CC7H 007CC8H to 007CCFH 007CD0H to 007CD7H 007CD8H to 007CDFH 007CE0H to 007CE7H 007CE8H to 007CEFH Register Data Register 0 (8 bytes) Data Register 1 (8 bytes) Data Register 2 (8 bytes) Data Register 3 (8 bytes) Data Register 4 (8 bytes) Data Register 5 (8 bytes) Data Register 6 (8 bytes) Data Register 7 (8 bytes) Data Register 8 (8 bytes) Data Register 9 (8 bytes) Data Register 10 (8 bytes) Data Register 11 (8 bytes) Data Register 12 (8 bytes) Data Register 13 (8 bytes) Abbreviation Access Initial Value XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB
DTR0
R/W
DTR1
R/W
DTR2
R/W
DTR3
R/W
DTR4
R/W
DTR5
R/W
DTR6
R/W
DTR7
R/W
DTR8
R/W
DTR9
R/W
DTR10
R/W
DTR11
R/W
DTR12
R/W
DTR13
R/W
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MB90340E Series
List of Message Buffers (DLC Registers and Data Registers) (3) Address CAN0 007AF0H to 007AF7H 007AF8H to 007AFFH CAN1 007CF0H to 007CF7H 007CF8H to 007CFFH Register Data Register 14 (8 bytes) Data Register 15 (8 bytes) Abbreviation Access Initial Value XXXXXXXXB to XXXXXXXXB XXXXXXXXB to XXXXXXXXB
DTR14
R/W
DTR15
R/W
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INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER
Interrupt cause Reset INT9 instruction Exception CAN 0 RX CAN 0 TX/NS CAN 1 RX / Input Capture 6 CAN 1 TX/NS / Input Capture 7 CAN 2 RX / I2C0 CAN 2 TX/NS 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3 PPG 0/1/4/5 PPG 2/3/6/7 PPG 8/9/C/D PPG A/B/E/F Time Base Timer External Interrupt 0 to 3, 8 to 11 Watch Timer External Interrupt 4 to 7, 12 to 15 A/D Converter Free-run Timer 0 / Free-run Timer 1 Input Capture 4/5 / I2C1 Output Compare 0/1/4/5 Input Capture 0 to 3 Output Compare 2/3/6/7 UART 0 RX UART 0 TX UART 1 RX / UART 3 RX UART 1 TX / UART 3 TX EI2OS Support N N N N N Y1 Y1 N N Y1 Y1 Y1 Y1 N N N N N Y1 N Y1 Y1 N Y1 Y1 Y1 Y1 Y2 Y1 Y2 Y1 6 7 8 9 10 11 12 13 4 5 3 0 1 2 DMA channel number Interrupt vector Number #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 Address FFFFDCH FFFFD8H FFFFD4H FFFFD0H FFFFCCH FFFFC8H FFFFC4H FFFFC0H FFFFBCH FFFFB8H FFFFB4H FFFFB0H FFFFACH FFFFA8H FFFFA4H FFFFA0H FFFF9CH FFFF98H FFFF94H FFFF90H FFFF8CH FFFF88H FFFF84H FFFF80H FFFF7CH FFFF78H FFFF74H FFFF70H FFFF6CH FFFF68H FFFF64H ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 ICR12 ICR13 0000B0H 0000B1H 0000B2H 0000B3H 0000B4H 0000B5H 0000B6H 0000B7H 0000B8H 0000B9H 0000BAH 0000BBH 0000BCH 0000BDH (Continued) Interrupt control register Number Address
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MB90340E Series
(Continued) Interrupt cause UART 2 RX / UART 4 RX UART 2 TX / UART 4 TX Flash Memory Delayed Interrupt Y1 : Usable Y2 : Usable, with EI2OS stop function N : Unusable Notes : The peripheral resources sharing the ICR register have the same interrupt level. When two peripheral resources share the ICR register, only one can use Extended Intelligent I/O Service at a time. When either of the two peripheral resources sharing the ICR register specifies Extended Intelligent I/O Service, the other one cannot use interrupts. EI2OS Support Y2 Y1 N N DMA channel number 14 15 Interrupt vector Number #39 #40 #41 #42 Address FFFF60H FFFF5CH FFFF58H FFFF54H Interrupt control register Number ICR14 ICR15 Address 0000BEH 0000BFH
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ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter Symbol VCC Power supply voltage*1 AVCC AVRH, AVRL VI
1
Rating Min VSS S 0.3 VSS S 0.3 VSS S 0.3 VSS S 0.3 VSS S 0.3 S 4.0 Max VSS + 6.0 VSS + 6.0 VSS + 6.0 VSS + 6.0 VSS + 6.0 +4.0 40 15 4 100 50 S S S S S 40 S 55 15 4 100 50 450 +105 +150
Unit V V V V V mA mA mA mA mA mA mA mA mA mA mW C C
Remarks
VCC = AVCC*2 AVCC AVRH, AVCC AVRH AVRL *3 *3 *5 *5 *4, *6 *4, *7 *4 *4, *8 *4, *6 *4, *7 *4 *4, *8 AVRL,
Input voltage*1 Output voltage* Maximum Clamp Current Total Maximum Clamp Current "L" level maximum output current "L" level average output current "L" level maximum overall output current "L" level average overall output current "H" level maximum output current "H" level average output current "H" level maximum overall output current "H" level average overall output current Power consumption Operating temperature Storage temperature
VO ICLAMP |ICLAMP| IOL IOLAV IOL IOLAV IOH IOHAV IOH IOHAV PD TA TSTG
*1: This parameter is based on VSS = AVSS = 0 V *2: Set AVCC and VCC to the same voltage. Make sure that AVCC does not exceed VCC and that the voltage at the analog inputs does not exceed AVCC when the power is switched on. *3: VI and VO should not exceed VCC + 0.3 V. VI should not exceed the specified ratings. However if the maximum current to/from an input is limited by some means with external components, the ICLAMP rating supersedes the VI rating. *4: Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67, P70 to P77, P80 to P87, P90 to P97, PA0, PA1 *5: Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57 (Evaluation device : P50 to P55) , P60 to P67, P70 to P77, P80 to P87, P90 to P97, PA0 to PA1 Use within recommended operating conditions. Use with DC voltage (current) The +B signal should always be applied by using a limiting resistance placed between the +B signal and the microcontroller. The value of the limiting resistance should be set so that when the +B signal is applied, the input current to the microcontroller pin does not exceed the rated value, either instantaneously or for prolonged periods. Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices. (Continued)
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MB90340E Series
(Continued) Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V) , the power supply is provided from the pins, so that incomplete operation may result. Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset. Care must be taken not to leave the +B input pin open. Sample recommended circuits: * Input/output equivalent circuits
Protective diode
VCC
Limiting resistance +B input (0 V to 16 V)
P-ch
N-ch
R
*6: The maximum output current is defined as the peak value of the current of any one of the corresponding pins. *7: The average output current is defined as the value of the average current flowing over 100 ms at any one of the corresponding pins. *8: The average total output current is defined as the value of the average current flowing over 100 ms at all of the corresponding pins. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
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2. Recommended Operating Conditions
(VSS = AVSS = 0 V) Parameter Symbol Value Min 4.0 Power supply voltage VCC, AVCC 3.5 4.5 3.0 Smoothing capacitor Operating temperature C Pin Connection Diagram CS TA 0.1 S 40 Typ 5.0 5.0 5.0 Max 5.5 5.5 5.5 5.5 1.0 + 105 Unit V V V V F C Remarks Under normal operation Under normal operation, when not using the A/D converter and not Flash programming. When External bus is used. Maintains RAM data in stop mode Use a ceramic capacitor or capacitor of better AC characteristics. Capacitor at the VCC should be greater than this capacitor.
C
CS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand.
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MB90340E Series
3. DC Characteristics
(TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Symbol Pin Condition Min 0.8 VCC Value Typ Max VCC + 0.3 Unit 24 MHz, VSS = AVSS = 0 V) Remarks Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P85) Port inputs if Automotive input levels are selected Port inputs if TTL input levels are selected P12, P50, P82, P85 inputs if CMOS input levels are selected P44, P45, P46, P47 inputs if CMOS hysteresis input levels are selected RST input pin (CMOS hysteresis) MD input pin Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P85) Port inputs if Automotive input levels are selected Port inputs if TTL input levels are selected P12, P50, P82, P85 inputs if CMOS input levels are selected P44, P45, P46, P47 inputs if CMOS hysteresis input levels are selected RST input pin (CMOS hysteresis) MD input pin
VIHS
V
VIHA Input H voltage (At VCC = 5 V 10% ) VIHT VIHS VIHI VIHR VIHM VILS
0.8 VCC 2.0 0.7 VCC 0.7 VCC 0.8 VCC VCC S 0.3 VSS S 0.3
VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 0.2 VCC
V V V V V V V
VILA Input L voltage (At VCC = 5 V 10% ) VILT VILS VILI VILR VILM Output H voltage Output H voltage Output L voltage Output L voltage VOH VOHI VOL VOLI Normal outputs I2C current outputs Normal outputs I2C current outputs
VSS S 0.3 VSS S 0.3 VSS S 0.3 VSS S 0.3 VSS S 0.3 VSS S 0.3 VCC = 4.5 V, VCC S 0.5 IOH = S 4.0 mA VCC = 4.5 V, VCC S 0.5 IOH = S 3.0 mA VCC = 4.5 V, IOL = 4.0 mA VCC = 4.5 V, IOL = 3.0 mA
0.5 VCC 0.8 0.3 VCC 0.3 VCC 0.2 VCC VSS + 0.3
V V V V V V V V
0.4 0.4
V V (Continued)
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(Continued) Parameter Input leak current Pull-up resistance Symbol IIL RUP P00 to P07, P10 to P17, P20 to P27, P30 to P37, RST MD2 VCC = 5.0 V, Internal frequency : 24 MHz, At normal operation. VCC = 5.0 V, Internal frequency : 24 MHz, At writing Flash memory. VCC = 5.0 V, Internal frequency : 24 MHz, At erasing Flash memory. VCC = 5.0 V, Internal frequency : 24 MHz, In Sleep mode. VCC = 5.0 V, Internal frequency : 2 MHz, In Main Timer mode VCC = 5.0 V, Internal frequency : 24 MHz, In PLL Timer mode, external frequency = 4 MHz VCC = 5.0 V Internal frequency : 8 kHz, In sub operation TA = +25C VCC = 5.0 V Internal frequency : 8 kHz, In sub sleep TA = +25C VCC = 5.0 V Internal frequency : 8 kHz, In watch mode TA = +25C VCC = 5.0 V, In Stop mode, TA = +25C (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Pin Condition VCC = 5.5 V, VSS < VI < VCC Min S1 25 24 MHz, VSS = AVSS = 0 V) Unit Remarks A k Except Flash memory devices
Value Typ Max +1 50 100
Pull-down resistance
RDOWN
25
50
100
k
55 70 75 25 0.3
70 85 90 35 0.8
mA Flash mA memory devices Flash mA memory devices mA mA
ICC
ICCS ICTS Power supply current*
ICTSPLL6
VCC
4
7
mA
ICCL
70
140
A
ICCLS
20
50
A
ICCT
10
35
A
ICCH Other than C, AVCC, AVSS, AVRH, AVRL, VCC, VSS
7
25
A
Input capacitance
CIN
5
15
pF
* : The power supply current is measured with an external clock. DS07-13747-4E 55
MB90340E Series
4. AC Characteristics
(1) Clock Timing (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Symbol Pin Value Min 3 4 Typ Max 16 16 Unit MHz MHz 24 MHz, VSS = AVSS = 0 V) Remarks When using an oscillation circuit PLL multiplied by 1 When using an oscillation circuit PLL multiplied by 2 When using an oscillation circuit PLL multiplied by 3 When using an oscillation circuit PLL multiplied by 4 When using an oscillation circuit PLL multiplied by 6 When using an oscillation circuit When using an external clock* When using an oscillation circuit When using an external clock Duty ratio is about 30% 70% . When using main clock When using sub clock When using main clock When using sub clock to
4
12
MHz
Clock frequency
fC
X0, X1
4
8
MHz
4
6
MHz
4 3 fCL tCYL X0, X1 tCYLL Input clock pulse width Input clock rise and fall time Internal operating clock frequency (machine clock) Internal operating clock cycle time (machine clock) PWH, PWL PWHL, PWLL tCR, tCF fCP fCPL tCP tCPL 41.67 20 122.1 X0A, X1A X0 X0A X0 1.5 8.192 41.67 10 10 5 15.2 5 24 50 666 30.5 333 -- X0A, X1A X0, X1 Clock cycle time -- 62.5 32.768 24 100 333
MHz MHz kHz ns ns s ns s ns MHz kHz ns s
When using external clock
* : When selecting the PLL clock, the range of clock frequency is limited. Use this product within the range as mentioned in "Relation between the external clock frequency and machine clock frequency".
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Clock Timing
tCYL
X0
PWH tCF PWL tCR
0.8 VCC 0.2 VCC
tCYLL
X0A
PWHL tCF PWLL tCR
0.8 VCC 0.2 VCC
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MB90340E Series
Guaranteed PLL operation range
Guaranteed operation range 5.5 4.0 3.5 Guaranteed PLL operation range Guaranteed A/D Converter operation range
Power supply voltage VCC (V)
1.5
4 Machine clock fCP (MHz)
24
Guaranteed operation range of MB90340E series
Guaranteed oscillation frequency range 24 x6 x4 x3 x2 x1
Internal clock fCP (MHz)
16 12 8 4.0 1.5 3 4 8 12 16 24 External clock fC (MHz) * x 1/2 (PLL off)
* : When using a crystal oscillator or ceramic oscillator, the maximum oscillation clock frequency is 16 MHz
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(2) Reset Standby Input (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Symbol Pin Value Min 500 Reset input time tRSTL RST Oscillation time of oscillator* + 100 s 100 Max Unit ns s s 24 MHz, VSS = AVSS = 0.0 V) Remarks Under normal operation In Stop mode, Sub Clock mode, Sub Sleep mode and Watch mode In Time Timer mode
* : The oscillation time of the oscillator is the time it takes for the amplitude of the oscillations to reach 90% . For crystal oscillators, this time is between several ms and several tens of ms, for ceramic oscillators the time is between several hundred s and several ms, and for an external clock, the time is 0 ms.
Under normal operation: tRSTL
RST
0.2 VCC 0.2 VCC
In Stop mode, Sub Clock mode, Sub Sleep mode, Watch mode:
tRSTL
RST
0.2 VCC 90% of amplitude 0.2 VCC
X0
Internal operation clock
Oscillation time of oscillator
100 s Oscillation stabilization waiting time Instruction execution
Internal reset
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(3) Power On Reset (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Power on rise time Power off time Symbol tR tOFF Pin VCC VCC Condition Value Min 0.05 1 Max 30 Unit ms ms Waiting time until power-on 24 MHz, VSS = AVSS = 0.0 V) Remarks
tR 2.7 V 0.2 V 0.2 V tOFF 0.2 V
VCC
Note : If you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you startup smoothly by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you can operate while using the PLL clock.
VCC 3V VSS
Holds RAM data We recommend a rise of 50 mV/ms maximum.
(4) Clock Output Timing (TA = S 40 C to +105 C, VCC = 5.0 V 10% , VSS = 0.0 V, fCP Parameter Cycle time CLK CLK Symbol tCYC tCHCL Pin CLK CLK Condition Value Min 62.5 41.67 20 13 Max Unit ns ns ns ns Remarks fCP = 16 MHz fCP = 24 MHz fCP = 16 MHz fCP = 24 MHz 24 MHz)
tCYC tCHCL
CLK
2.4 V 0.8 V
2.4 V
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(5) Bus Timing (Read) Parameter ALE pulse width Valid address ALE time ALE Address valid time Valid address RD time Valid address Valid data input RD pulse width RD RD RD RD Valid data input Data hold time ALE time Address valid time (TA = S 40 C to +105 C, VCC = 5.0 V 10% , VSS = 0.0 V, fCP Value Symbol Pin Condition Min Max tLHLL tAVLL tLLAX tAVRL tAVDV tRLRH tRLDV tRHDX tRHLH tRHAX tAVCH time time tRLCH tLLRL ALE ALE, A23 to A16, AD15 to AD00 ALE, AD15 to AD00 A23 to A16, AD15 to AD00, RD A23 to A16, AD15 to AD00 RD RD, AD15 to AD00 RD, AD15 to AD00 RD, ALE RD, A23 to A16 A23 to A16, AD15 to AD00, CLK RD, CLK ALE, RD
tRLCH 2.4 V
24 MHz) Unit ns ns ns ns
tCP/2 S 10 tCP/2 S 20 tCP/2 S 15 tCP S 15 5 tCP/2 S 60 3 tCP/2 S 20 3 tCP/2 S 50 0 tCP/2 S 15 tCP/2 S 10 tCP/2 S 16 tCP/2 S 15 tCP/2 S 15
ns ns ns ns ns ns ns ns ns
Valid address CLK time RD ALE CLK RD
tAVCH CLK 2.4 V 0.8 V tAVLL ALE 2.4 V tLHLL tAVRL RD tLLRL tLLAX 2.4 V 0.8 V
tRHLH 2.4 V
tRLRH 2.4 V 0.8 V
tRHAX A23 to A16 2.4 V 0.8 V tAVDV AD15 to AD00 2.4 V 0.8 V Address 2.4 V 0.8 V tRLDV VIH VIL 2.4 V 0.8 V tRHDX Read data VIH VIL
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(6) Bus Timing (Write) (TA = S 40 C to +105 C, VCC = 5.0 V 10% , VSS = 0.0 V, fCP Value Symbol Pin Condition Min Max time tAVWL tWLWH WR time tDVWH tWHDX tWHAX tWHLH tWLCH A23 to A16, AD15 to AD00, WR WR AD15 to AD00, WR AD15 to AD00, WR A23 to A16, WR WR, ALE WR, CLK tCPS 15 3 tCP/2 S 20 3 tCP/2 S 20 15 tCP/2 S 10 tCP/2 S 15 tCP/2 S 15 24 MHz) Unit
Parameter
Valid address WR pulse width Valid data output WR WR WR WR
WR
ns ns ns ns ns ns ns
Data hold time Address valid time ALE CLK time time
tWLCH CLK 2.4 V
tWHLH ALE 2.4 V
tAVWL WR (WRL, WRH) 0.8 V
tWLWH 2.4 V
tWHAX A23 to A16 2.4 V 0.8 V tDVWH AD15 to AD00 2.4 V 0.8 V Address 2.4 V 0.8 V Write data 2.4 V 0.8 V tWHDX 2.4 V 0.8 V
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(7) Ready Input Timing (TA = S 40 C to +105 C, VCC = 5.0 V 10% , VSS = 0.0 V, fCP 24 MHz) Rated Value Test Pin Unit Remarks Condition Min Max RDY RDY 45 32 0 ns ns ns fCP = 16 MHz fCP = 24 MHz
Parameter RDY setup time RDY hold time
Symbol tRYHS tRYHH
Note : If the RDY setup time is insufficient, use the auto-ready function.
CLK
2.4 V
ALE
RD/WR tRYHS RDY When WAIT is not used. VIH tRYHH VIH
RDY When WAIT is used.
VIL
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(8) Hold Timing (TA = S 40 C to +105 C, VCC = 5.0 V 10% , VSS = 0.0 V, fCP Value Symbol Pin Condition Min Max time tXHAL tHAHV HAK HAK 30 tCP tCP 2 tCP 24 MHz) Unit ns ns
Parameter Pin floating HAK time HAK
Pin valid time
Note : There is more than 1 cycle from when HRQ reads in until the HAK is changed.
HAK tXHAL Each pin 2.4 V 0.8 V
2.4 V 0.8 V tHAHV Hi-Z 2.4 V 0.8 V
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(9) LIN-UART0/1/2/3 * Bit setting: ESCR:SCES = 0, ECCR:SCDE = 0 (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Serial clock cycle time SCK Valid SIN SCK SOT delay time SCK Valid SIN hold time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSHSL tSLSH tSLOVE tIVSHE tSHIXE tF tR Pin SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 Internal shift clock SCK0 to SCK3, mode output pins are SIN0 to SIN3 CL = 80 pF + 1 TTL. SCK0 to SCK3, SIN0 to SIN3 SCK0 to SCK3 SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 Condition
24 MHz, VSS = 0 V) Value Unit Min Max ns +50 ns ns ns ns ns 2 tCP + 60 30 ns ns ns 10 10 ns ns
5 tCP S 50 tCP + 80 0 3 tCP - tR tCP + 10
Serial clock "L" pulse width Serial clock "H" pulse width SCK Valid SIN SCK SOT delay time SCK Valid SIN hold time
External shift clock SCK0 to SCK3, mode output pins are SIN0 to SIN3 CL = 80 pF + 1 TTL. SCK0, SCK1, SIN0 to SIN3 SCK0 to SCK3 SCK0 to SCK3
tCP + 30
SCK fall time SCK rise time
Notes : AC characteristic in CLK synchronized mode. CL is load capacity value of pins when testing. tCP is internal operating clock cycle time (machine clock) . Refer to " (1) Clock Timing". Internal Shift Clock Mode
tSCYC 2.4 V 0.8 V tSLOVI 2.4 V 0.8 V tIVSHI tSHIXI VIH VIL 0.8 V
SCK0 to SCK3
SOT0 to SOT3
SIN0 to SIN3
VIH VIL
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External Shift Clock Mode
tSLSH tSHSL VIH VIL tF tSLOVE 2.4 V 0.8 V tIVSHE tSHIXE VIH VIL VIL tR VIH
SCK0 to SCK3
SOT0 to SOT3
SIN0 to SIN3
VIH VIL
* Bit setting: ESCR:SCES = 1, ECCR:SCDE = 0 (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Serial clock cycle time SCK Valid SIN SCK SOT delay time SCK Valid SIN hold time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSHSL tSLSH tSHOVE tIVSLE tSLIXE tF tR Pin SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 Internal shift clock SCK0 to SCK3, mode output pins are SIN0 to SIN3 CL = 80 pF + 1 TTL. SCK0 to SCK3, SIN0 to SIN3 SCK0 to SCK3 SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 Condition
24 MHz, VSS = 0 V) Value Unit Min Max ns +50 ns ns ns ns ns 2 tCP + 60 30 ns ns ns 10 10 ns ns
5 tCP S 50 tCP + 80 0 3 tCP - tR tCP + 10
Serial clock "H" pulse width Serial clock "L" pulse width SCK Valid SIN SCK SOT delay time SCK Valid SIN hold time
External shift clock SCK0 to SCK3, mode output pins are SIN0 to SIN3 CL = 80 pF + 1 TTL. SCK0 to SCK3, SIN0 to SIN3 SCK0 to SCK3 SCK0 to SCK3
tCP + 30
SCK fall time SCK rise time
Notes : CL is load capacity value of pins when testing. tCP is internal operating clock cycle time (machine clock) . Refer to " (1) Clock Timing".
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Internal Shift Clock Mode
tSCYC 2.4 V 0.8 V tSHOVI 2.4 V 0.8 V tIVSLI tSLIXI VIH VIL
SCK0 to SCK3
SOT0 to SOT3
SIN0 to SIN3
VIH VIL
External Shift Clock Mode
tSHSL tSLSH VIH VIL tR tSHOVE 2.4 V 0.8 V tIVSLE tSLIXE VIH VIL tF VIL VIH
SCK0 to SCK3
SOT0 to SOT3
SIN0 to SIN3
VIH VIL
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* Bit setting: ESCR:SCES = 0, ECCR:SCDE = 1 (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Serial clock cycle time SCK Valid SIN SCK SOT SOT delay time SCK Valid SIN hold time SCK delay time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSOVLI Pin SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 SCK0 to SCK3, Internal clock operation SIN0 to SIN3 output pins are SCK0 to SCK3, CL = 80 pF + 1 TTL. SIN0 to SIN3 SCK0 to SCK3, SOT0 to SOT3 Condition Min 5 tCP S 50 tCP + 80 0 3 tCP S 70 +50 24 MHz, VSS = 0 V) Value Max Unit ns ns ns ns ns
Notes : CL is load capacity value of pins when testing. tCP is internal operating clock cycle time (machine clock) . Refer to " (1) Clock Timing".
tSCYC
SCK0 to SCK3
tSOVLI
2.4 V 0.8 V tSHOVI 2.4 V 0.8 V tIVSLI tSLIXI VIH VIL 0.8 V
SOT0 to SOT3
2.4 V 0.8 V
SIN0 to SIN3
VIH VIL
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* Bit setting: ESCR:SCES = 1, ECCR:SCDE = 1 (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP Parameter Serial clock cycle time SCK Valid SIN SCK SOT SOT delay time SCK Valid SIN hold time SCK delay time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSOVHI Pin SCK0 to SCK3 SCK0 to SCK3, SOT0 to SOT3 SCK0 to SCK3, Internal clock operation SIN0 to SIN3 output pins are SCK0 to SCK3, CL = 80 pF + 1 TTL. SIN0 to SIN3 SCK0 to SCK3, SOT0 to SOT3 Condition Min 5 tCP S 50 tCP + 80 0 3 tCP S 70 +50 24 MHz, VSS = 0 V) Value Max Unit ns ns ns ns ns
Notes : CL is load capacity value of pins when testing. tCP is internal operating clock cycle time (machine clock) . Refer to " (1) Clock Timing".
tSCYC
SCK0 to SCK3
tSOVHI
2.4 V 0.8 V tSLOVI 2.4 V 0.8 V tIVSHI tSHIXI VIH VIL
2.4 V
SOT0 to SOT3
2.4 V 0.8 V
SIN0 to SIN3
VIH VIL
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(11) Timer Related Resource Input Timing (TA = S 40 C to +105 C, VCC = 5.0 V 10% , fCP 24 MHz, VSS = 0 V) Value Parameter Symbol Pin Condition Unit Min Max Input pulse width tTIWH tTIWL TIN0 to TIN3, IN0 to IN7 4 tCP ns
VIH
VIH VIL tTIWH tTIWL VIL
TIN0 to TIN3, IN0 to IN7
(12) Timer Related Resource Output Timing (TA = -40C to +105C, VCC = 5.0 V 10% , fCP 24 MHz, VSS = 0.0 V) Value Parameter Symbol Pin Condition Unit Min Max CLK TOUT change time tTO TOT0 to TOT3, PPG0 to PPGF 30 ns
CLK
2.4 V
TOT0 to TOT3, PPG0 to PPGF
tTO
2.4 V 0.8 V
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8. Flash Memory Program/Erase Characteristics
Parameter Sector erase time Chip erase time Word (16-bit width) programming time Program/Erase cycle Flash Data Retention Time Average TA = +85 C 10000 20 TA = +25 C VCC = 5.0 V Conditions Value Min Typ 1 9 16 3600 Max 15 Unit s s s cycle year * Remarks Excludes programming prior to erasure Excludes programming prior to erasure Except for the over head time of the system
* : This value was converted from the results of evaluating the reliability of the technology (using Arrhenius equation to translate high temperature measurements into normalized value at +85 C) .
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EXAMPLE CHARACTERISTICS
* MB90F346E, MB90F346ES, MB90F346CE, MB90F346CES ICC S VCC
TA = +25 C, external clock operation f = Internal operation frequency
70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 100 90 80 70 60 50 40 30 20 10 0
ICCL S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICC (mA)
40 30 20 10 0
ICCL ( A)
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICCS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
35 30 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 50 45 40 35 30 25 20 15 10 5 0
ICCLS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICCS (mA)
20 15 10 5 0
ICCLS ( A)
25
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICTS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
400 350 300 250 200 150 100 50 0 2.5 3.5 4.5 20 18 16 14 12 10 8 6 4 2 0
ICCT S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICCT ( A)
ICTS ( A)
f = 2 MHz
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICTSPLL6 S VCC
TA = +25 C, external clock operation f = Internal operation frequency
10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0
ICCH S VCC
TA = +25 C, stopped
ICTSPLL6 (mA)
f = 24 MHz
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICCH ( A)
2.5
3.5
4.5
VCC (V)
5.5
6.5
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* MB90F349E, MB90F349ES, MB90F349CE, MB90F349CES ICC S VCC
TA = +25 C, external clock operation f = Internal operation frequency
70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 100 90 80 70 60 50 40 30 20 10 0
ICCL S VCC
TA = +25 C, external clock operation f = Internal operation frequency
f = 8 kHz
ICC (mA)
40 30 20 10 0 5.5
ICCL ( A)
VCC (V)
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICCS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
35 30 25 f = 24 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 50 45 40 35 30 25 20 15 10 5 0
ICCLS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICCS (mA)
20 15 10 5 0 5.5
ICCLS ( A)
f = 20 MHz
f = 8 kHz
VCC (V)
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICTS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
400 350 300 20 18 16 14 12 10 8 6 4 2 0
ICCT S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICTS ( A)
200 150 100 50 0 2.5 3.5 4.5
ICCT ( A)
250
f = 2 MHz
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICTSPLL6 S VCC
TA = +25 C, external clock operation f = Internal operation frequency
10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0
ICCH S VCC
TA = +25 C, stopped
ICTSPLL6 (mA)
f = 24 MHz
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICCH ( A)
2.5
3.5
VCC (V)
4.5
5.5
6.5
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* MB90F345E, MB90F345ES, MB90F345CE, MB90F345CES ICC S VCC
TA = +25 C, external clock operation f = Internal operation frequency
70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 100 90 80 70 60 50 40 30 20 10 0
ICCL S VCC
TA = +25 C, external clock operation f = Internal operation frequency
f = 8 kHz
ICC (mA)
40 30 20 10 0 5.5
ICCL ( A)
VCC (V)
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICCS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
35 30 25 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 50 45 40 35 30 25 20 15 10 5 0
ICCLS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICCS (mA)
15 10 5 0 5.5
ICCLS ( A)
20
f = 8 kHz
VCC (V)
6.5
2.5
3.5
4.5
5.5
6.5
VCC (V)
ICTS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
400 350 300 20 18 16 14 12 10 8 6 4 2 0
ICCT S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICTS ( A)
250 200 150 100 50 0 2.5 3.5 4.5
ICCT ( A)
f = 2 MHz
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICTSPLL6 S VCC
TA = +25 C, external clock operation f = Internal operation frequency
10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0
ICCH S VCC
TA = +25 C, stopped
ICTSPLL6 (mA)
f = 24 MHz
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICCH ( A)
2.5
3.5
VCC (V)
4.5
5.5
6.5
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* MB90346E, MB90346ES, MB90346CE, MB90346CES ICC S VCC
TA = +25 C, external clock operation f = Internal operation frequency
70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 100 90 80 70 60 50 40 30 20 10 0
ICCL S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICC (mA)
40 30 20 10 0 5.5
ICCL ( A)
f = 8 kHz
VCC (V)
6.5
2.5
3.5
4.5
VCC (V)
5.5
6.5
ICCS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
35 30 f = 24 MHz f = 20 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 f = 16 MHz 50 45 40 35 30 25 20 15 10 5 0
ICCLS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
ICCS (mA)
25 20 15 10 5 0
ICCLS ( A)
f = 8 kHz
VCC (V)
2.5
3.5
4.5
5.5
6.5
ICTS S VCC
TA = +25 C, external clock operation f = Internal operation frequency
400 350 300 20 18 16 14 12 10 8 6 4 2 0
ICCT S VCC
VCC (V)
TA = +25 C, external clock operation f = Internal operation frequency
ICTS ( A)
200 150 100 50 0 2.5 3.5 4.5
ICCT ( A)
250
f = 2 MHz
f = 8 kHz
VCC (V)
5.5
6.5
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICTSPLL6 S VCC
TA = +25 C, external clock operation f = Internal operation frequency
10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0
ICCH S VCC
TA = +25 C, stopped
ICTSPLL6 (mA)
f = 24 MHz
2.5
3.5
VCC (V)
4.5
5.5
6.5
ICCH ( A)
2.5
3.5
VCC (V)
4.5
5.5
6.5
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ORDERING INFORMATION
Part number MB90F342EPF MB90F342ESPF MB90F342CEPF MB90F342CESPF MB90F342EPMC MB90F342ESPMC MB90F342CEPMC MB90F342CESPMC MB90F345EPF MB90F345ESPF MB90F345CEPF MB90F345CESPF MB90F345EPMC MB90F345ESPMC MB90F345CEPMC MB90F345CESPMC MB90F346EPF MB90F346ESPF MB90F346CEPF MB90F346CESPF MB90F346EPMC MB90F346ESPMC MB90F346CEPMC MB90F346CESPMC (Continued) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) Package Remarks
86
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Part number MB90F347EPF MB90F347ESPF MB90F347CEPF MB90F347CESPF MB90F347EPMC MB90F347ESPMC MB90F347CEPMC MB90F347CESPMC MB90F349EPF MB90F349ESPF MB90F349CEPF MB90F349CESPF MB90F349EPMC MB90F349ESPMC MB90F349CEPMC MB90F349CESPMC MB90341EPF MB90341ESPF MB90341CEPF MB90341CESPF MB90341EPMC MB90341ESPMC MB90341CEPMC MB90341CESPMC MB90342EPF MB90342ESPF MB90342CEPF MB90342CESPF MB90342EPMC MB90342ESPMC MB90342CEPMC MB90342CESPMC
Package 100-pin plastic QFP (FPT-100P-M06)
Remarks
100-pin plastic LQFP (FPT-100P-M20)
100-pin plastic QFP (FPT-100P-M06)
100-pin plastic LQFP (FPT-100P-M20)
100-pin plastic QFP (FPT-100P-M06)
100-pin plastic LQFP (FPT-100P-M20)
100-pin plastic QFP (FPT-100P-M06)
100-pin plastic LQFP (FPT-100P-M20) (Continued)
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(Continued) Part number MB90346EPF MB90346ESPF MB90346CEPF MB90346CESPF MB90346EPMC MB90346ESPMC MB90346CEPMC MB90346CESPMC MB90347EPF MB90347ESPF MB90347CEPF MB90347CESPF MB90347EPMC MB90347ESPMC MB90347CEPMC MB90347CESPMC MB90348EPF MB90348ESPF MB90348CEPF MB90348CESPF MB90348EPMC MB90348ESPMC MB90348CEPMC MB90348CESPMC MB90349EPF MB90349ESPF MB90349CEPF MB90349CESPF MB90349EPMC MB90349ESPMC MB90349CEPMC MB90349CESPMC MB90V340E-101CR MB90V340E-102CR 299-pin ceramic PGA (PGA-299C-A01) For evaluation 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06) 100-pin plastic LQFP (FPT-100P-M20) 100-pin plastic QFP (FPT-100P-M06)
Package
Remarks
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MB90340E Series
PACKAGE DIMENSIONS
100-pin plastic LQFP Lead pitch Package width x package length Lead shape Sealing method Mounting height Weight 0.50 mm 14.0 mm x 14.0 mm Gullwing Plastic mold 1.70 mm Max 0.65 g P-LFQFP100-14x 14-0.50
(FPT-100P-M20)
Code (Reference)
100-pin plastic LQFP (FPT-100P-M20)
16.000.20(.630.008)SQ
Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder.
* 14.000.10(.551.004)SQ
75 51
76
50
0.08(.003) Details of "A" part
INDEX
1.50 -0.10 .059 -.004 (Mounting height)
26
+0.20
+.008
100
0~8 "A" 0.500.20 (.020.008) 0.600.15 (.024.006)
0.100.10 (.004.004) (Stand off) 0.25(.010)
1
25
0.50(.020)
0.200.05 (.008.002)
0.08(.003)
M
0.1450.055 (.006.002)
C
2005 -2010 FUJITSU SEMICONDUCTOR LIMITED F100031S-c-3-5
Dimensions in mm (inches). Note: The values in parentheses are reference values
Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) DS07-13747-4E 89
MB90340E Series
MAIN CHANGES IN THIS EDITION
Page Section Change Results Deleted the part numbers; MB90F343E(S), MB90F343CE(S) ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Added "*6" in remark for "L" level maximum output current and "H" level maximum output current. Added "*7" in remark for "L" level average output current and "H" level average output current. Added "*8" in remark for "L"level average overall output current and "H" level average overall output current. Added as follows. "*6:The maximum output current is defined as the peak value of the current of any one of the corresponding pins." "*7:The average output current is defined as the value of the average current flowing over 100 ms at any one of the corresponding pins." "*8:The average total output current is defined as the value of the average current flowing over 100 ms at all of the corresponding pins."
51
52
The vertical lines marked in the left side of the page show the changes.
DS07-13747-4E
91
MB90340E Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Europe FUJITSU SEMICONDUCTOR EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ Korea FUJITSU SEMICONDUCTOR KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU SEMICONDUCTOR or any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department

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